1. Field of the Invention
The present invention relates to a semiconductor device having a semiconductor switch structure that uses a transmission line such as a micro striped line comprising a metallic conductor and a field effect transistor.
2. Description of the Related Art
A semiconductor switch element using a field effect transistor (FET) may be expressed equivalently by resistance and capacitor. For example, an FET inserted into a transmission line is equivalent to resistance in ON status, while it becomes equivalent to capacitor in OFF status. As representative switch circuits using this kind of FET, there are, for example, a serial structure switch circuit wherein source and drain of FET 1901 are connected to an input terminal and an output terminal respectively as shown in FIG. 19, a parallel structure switch circuit wherein a source and drain of FET 2102 are connected to 2-line type transmission line respectively as shown in FIG. 21, a serial- parallel structure switch circuit which comprises FET 2301 and FET 2302 wherein the above serial structure and parallel structure are combined as shown in FIG. 23, a switch circuit that uses resonance between a serial FET 2501 and a coil 2502 parallelly connected thereto as shown in FIG. 25, and a switch circuit of a structure wherein .lambda./4 line 2702 is serially connected to a drain or a source of parallel connection FET 2701 as shown in FIG. 27.
In order to obtain large electric power in these switch circuits using FET, it is best to increase the gate width of FET. This in turn means to reduce the resistance value in an equivalent circuit of FET and increase the capacity value.
However, in each of the above switch circuits as the conventional semiconductor devices in the prior art, when gate width was increased so as to obtain large electric power, insertion loss or isolation that was determined by the resistance value and capacity value of FET was deteriorated in some cases, which has been a problem in the conventional semiconductor devices according to the prior art. This problem is explained more concretely hereinafter.
The transparent characteristics of each switch circuit in the case when the gate width Wg of FET 1901, 2101, 2301, 2302, 2501, and 2701 that structure respective switch circuits shown in FIG. 19, FIG. 21, FIG. 23, FIG. 25 and FIG. 27 is 100 .mu.m, and the case when that is 1 mm are shown in FIG. 20, FIG. 22, FIG. 24, FIG. 26 and FIG. 28. For example, the transparent characteristics of the serial structure switch circuit shown in FIG. 19 are shown in FIG. 20. In this FIG. 20, the characteristics of FET 1901 in the case when the gate width Wg is 1 mm are represented by a solid line, while those in the case when the gate width Wg is 100 .mu.m are represented by a dotted line. As shown in the figure, when the gate width Wg is 1 mm, the capacity value increases, as a result, the isolation, i.e., the power breaking capacity of switch at the moment when the switch is turned OFF decreases in comparison with the case when the gate width Wg is 100 .mu.m.
And, the transparent characteristics of a parallel structure switch circuit shown in FIG. 21 is shown in FIG. 22. In this FIG. 22 in turn, the characteristics of FET 2101 in the case when the gate width Wg is 1 mm are represented by solid lines I and II, while those in the case when the gate width Wg is 100 .mu.m are represented by dotted lines III and IV. In reference to FIG. 22, the isolation appears to increase in the case when the gate width is 1 mm (characteristicsII) more than in the case when the gate width is 100 .mu.m (characteristicsIV). However, the insertion loss, i.e., the power loss of switch at the moment when the switch is turned ON increases in the case when the gate width is 1 mm (characteristicsI) more than in the case when the gate width is 100 .mu.m (characteristics III).
While, the transparent characteristics of a serial- parallel structure switch circuit shown in FIG. 23 are shown in FIG. 24. In this FIG. 24, the characteristics of FET 2302 in the case when the gate width Wg is 1 mm are represented by solid lines V and VI, while those in the case when the gate width Wg is 100 .mu.m are represented by dotted lines VII and VIII. In reference to FIG. 24, the isolation changes according to the frequency as shown in characteristicsVI and characteristicsVIII, but at the same frequency, the isolation increases in the case when the gate width is 1 mm (characteristicsVI) more than in the case when the gate width is 100 .mu.m (characteristicsVIII). However, the insertion loss becomes larger in the case when the gate width is 1 mm (characteristics V) more than in the case when the gate width is 100 .mu.m (characteristics VII).
By the way, in the switch circuit of the serial-parallel structure in FIG. 23, the gate width of FET 2301 may differ from that of FET 2302. For example, as shown in FIG. 29, the transparent characteristics, both the isolation loss and the isolation, in the case when the gate width of FET 2301 is 100 .mu.m and that of FET 2302 is 1 mm change according to the increase of the frequency as shown in FIG. 30. But, even in the case when FET having different width is used, the insertion loss becomes large.
Further, the transparent characteristics of a switch circuit of a structure that uses a serial FET 2501 and a coil 2502 shown in FIG. 25 are shown in FIG. 26. In this FIG. 26, the characteristics in the case when the gate width Wg of FET 2501 is 1 mm are represented by a solid line. As illustrated, though preferable insertion loss can be obtained locally, the range is very narrow because resonance is used.
And the transparent characteristics of a switch circuit having a structure of a parallel FET 2701 and a serial .lambda./4 line 2702 shown in FIG. 27 are shown in FIG. 28. In this FIG. 28, the characteristics in the case when the gate width Wg of FET 2701 is 1 mm are represented by a dashed line IX and a solid line X. As known from the characteristicsX, the insertion loss at a high frequency band (60 GHz in this case) becomes large.
As mentioned in details in the above, it is difficult to obtain desired transparent characteristics in the conventional respective switch circuits according to the prior art. For instance, when the isolation loss is set at 1.5 dB and the isolation is set to 20 dB as the characteristic standards at the frequency band of 60 GHz, if the gate width Wg is set to 1 mm, the only circuit that satisfies the standards of isolation loss and isolation among the above conventional switch circuits is the circuit using the serial FET 2501 and a coil 2502 shown in FIG. 25. However, in the above switch circuit, as mentioned above, desired characteristics in insertion loss can be obtained only in an extremely narrow band.
As described heretofore, in the above respective switch circuits as semiconductor devices according to the prior art, there has been not any circuit structure that satisfies the requirement to increase the gate width of FET as a semiconductor switch element so as to obtain large power transmission, and the requirement to attain a low insertion loss and a high isolation especially at a high frequency and in a wide band at the same time, which has been the problem with the conventional semiconductor devices according to the prior art.